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[Embeded-SCM Develop] spiinterfaceverilog

Description: SPI Master Core Specification，This document provides specifications for the SPI (Serial Peripheral Interface) Master core-SPI Master Core Specification, This document provides specifications for the SPI (Serial Peripheral Interface) Master core
Platform: | Size: 82944 | Author: 贾远鸿 | Hits:

[VHDL-FPGA-Verilog] SPIBusVerilog

Description: SPI串行总线接口的Verilog实现，详细讲解实现过程。-SPI serial bus interface Verilog realization elaborate on the realization of the process.
Platform: | Size: 398336 | Author: zhlm88 | Hits:

[VHDL-FPGA-Verilog] SPI_Interface

Description: SPI接口的vhdl代码，可以实现与单片机的spi通信，完整的工程-SPI interface of the VHDL code can be achieved with SCM spi communication, complete works
Platform: | Size: 4096 | Author: wanyou2345 | Hits:

[VHDL-FPGA-Verilog] SimpleSpi

Description: SPI接口VHDL代码,内有说明,很详细.-SPI interface VHDL code, which has made it clear that, in great detail.
Platform: | Size: 180224 | Author: dushibiao | Hits:

[VHDL-FPGA-Verilog] SPI_AT45DB041B

Description: 用verilog编写的SPI程序,SPI芯片是AT45DB041B.文件内包含程序仿真时的截图.包括read和wirte.-SPI prepared using Verilog procedures, SPI chip AT45DB041B. Document contains procedures for simulation screenshot. Including read and wirte.
Platform: | Size: 77824 | Author: 温海龙 | Hits:

[VHDL-FPGA-Verilog] SPI_verilog_vhdl

Description: SPI串口的内核实现（分别使用verilog和vhdl语言描述的）-The core of the realization of SPI serial port (using Verilog and VHDL language description of the)
Platform: | Size: 13312 | Author: 徐剑 | Hits:

[VHDL-FPGA-Verilog] 13898372spi

Description: VHDL 实现 spi协议，很实用和通用，希望对你们有帮助哦！：）-VHDL realization of spi agreement, it is practical and versatile, and they hope to help you Oh! :)
Platform: | Size: 1024 | Author: 力智 | Hits:

[VHDL-FPGA-Verilog] 39709598spi

Description: spi接口程序，用VHDL写的，大家-spi interface program, written by VHDL, we
Platform: | Size: 3072 | Author: 黄坚 | Hits:

[VHDL-FPGA-Verilog] SPI_to_I2C

Description: SPI和I2C转换的verilogHDL程序-SPI and I2C conversion procedures verilogHDL
Platform: | Size: 3072 | Author: 秦建 | Hits:

[source in ebook] xapp348

Description: spi源码，是verliog的，有需要的可依参考进行设计自己的工程，后续有需要还有一个使用说明附上-spi-source is the verliog, reference may need to design their own projects, there is a need to have a follow-up instructions attached
Platform: | Size: 852992 | Author: lee | Hits:

[Embeded-SCM Develop] spi_wishbone

Description: spi wishbone bus code
Platform: | Size: 49152 | Author: 磊 | Hits:

[VHDL-FPGA-Verilog] SPIsend

Description: Verilog HDL的程式，上網找到SPI程式， vspi.v這程式相當好用可用來接收與傳送SPI，並且寫了一個傳輸信號測試，spidatasent.v這程式就是傳送的資料，分別為00 66... 01 77...... 02 55這樣的資料，並透過MAX+PULS II軟體進行模擬，而最外層的程式是test_createspi.v！-Verilog HDL programs, Internet find SPI program, vspi.v this very useful program can be used to receive and send SPI, and wrote a transmission signal test, spidatasent.v this program is to send the information, namely, 00 66 ... 01 77 ...... 02 55 This information, and through the MAX+ PULS II software simulation, while the outermost layer of the program are test_createspi.v!
Platform: | Size: 145408 | Author: Rick | Hits:

[VHDL-FPGA-Verilog] SPItoVHDL

Description: VHDL语言编写的 SPI总线控制器-VHDL language ah SPI bus controller. .
Platform: | Size: 339968 | Author: 王鹏 | Hits:

[VHDL-FPGA-Verilog] 61EDA_D954

Description: 用FPGA实现的ADC采样器,用vhdl编写，spi总线-FPGA implementation using the ADC sampler, prepared using VHDL, spi bus
Platform: | Size: 58368 | Author: nbm | Hits:

[Embeded-SCM Develop] AIC

Description: 使用FPGA/CPLD设置语音AD、DA转换芯片AIC23，FPGA/CPLD系统时钟为24.576MHz 1、AIC系统时钟为12.288MHz，SPI时钟为6.144MHz 2、AIC处于主控模式 3、input bit length 16bit output bit length 16bit MSB first 4、帧同步在96KHz-The use of FPGA/CPLD set voice AD, DA conversion chip AIC23, FPGA/CPLD system clock for the 24.576MHz 1, AIC system clock is 12.288MHz, SPI clock is 6.144MHz 2, AIC is in master mode 3, input bit length 16bit output bit length 16bit MSB first 4, frame synchronization at 96KHz
Platform: | Size: 2048 | Author: 张键 | Hits:

[Embeded-SCM Develop] FREQSYN

Description: 使用Verilog语言编写的使用SPI总线设置频率LM2346,可通过设置其R寄存器对其输出频率进行设置（需相应的射频电路相配合）。-The use of Verilog language use SPI bus frequency settings LM2346, can be by setting up its R register set of its output frequency (to be matched by corresponding RF circuitry).
Platform: | Size: 1024 | Author: 张键 | Hits:

[Embeded-SCM Develop] spicore

Description: 基于FPGA的SPI控制器.doc,包括FPGA实现地源代码和协议的基本介绍--FPGA-based SPI controller. Doc, including the FPGA to achieve an agreement to source code and a basic introduction
Platform: | Size: 7168 | Author: ss | Hits:

[VHDL-FPGA-Verilog] hex2rom_0241_Win32

Description: This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).
Platform: | Size: 96256 | Author: zhangdongqing | Hits:

[Embeded-SCM Develop] spi_op_core

Description: SPI协议的Verilog编程，包括时钟的产生模块，控制模块等-Verilog programming SPI protocol, including the selection of the clock module, control module, etc.
Platform: | Size: 82944 | Author: zhangyi | Hits:

[VHDL-FPGA-Verilog] spi_vhdl_source

Description: SPI的VHDL程序，经过quartus验证的，不错！-SPI of the VHDL program, after verification quartus, yes!
Platform: | Size: 671744 | Author: 王头 | Hits:
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